Turing machine-like structures in a V Neumann architecture

Today we saw a video about how a v. Neumann CPU architecture works, it's pretty easy once you have seen how it works. We found many turing machine structures in this kind of architecture, for example: the connection between CPU- Ram, it’s really simple, so ram contains all the information that process the CPU. The CPU sends an address to the ram, and via the enable cable, it tells the ram to process the address and the ram gives a date to the CPU, and this process repeats itself really fast and really frequently. We can see that the CPU makes an input and the ram an output

Another example is inside the CPU, precisely the control unit and ALU. Typically, the ALU has direct input and output access to the processor controller, main memory (random access memory or RAM in a personal computer), and input/output devices. Inputs and outputs flow along an electronic path that is called a bus. The input consists of an instruction word (sometimes called a machine instruction word) that contains an operation code (sometimes called an "op code"), one or more operands, and sometimes a format code. The operation code tells the ALU what operation to perform and the operands are used in the operation. (For example, two operands might be added together or compared logically.) The format may be combined with the op code and tells, for example, whether this is a fixed-point or a floating-point instruction. The output consists of a result that is placed in a storage register and settings that indicate whether the operation was performed successfully. (If it isn't, some sort of status will be stored in a permanent place that is sometimes called the machine status word.)